HPC events

CoEs Co-Design Workshop

The goal of this workshop is to first get an overview of what CoEs think of co-design and what they do in that context and then to build a shared and common view on this important issue . The workshop consists of two round tables where each panellist will make a short presentation that will be followed by a discussion among the panellists and with all participants. The workshop is open to all CoE members, so please disseminate largely.

Session 1 - 9:00 – 12:00

Different levels of co-design, where do CoEs come in?

Panelists: Fabio Affinito, Guillaume Houzeaux, Jesus Labarta, Soline Laforet, Anthony Scemama

Supercomputer are rather complex systems build using innovative technologies, both on the hardware and software sides. Therefore, co-design can be applied at different levels: chip, networks, low-level software, programming models and environment, libraries or applicarions...

In its design, a computer can also be more general purpose or tuned for a specific class of application.

This round table will discuss all these issue and how CoEs can best contribute.

     Zoom link:

     https://zoom.us/j/96850634356?pwd=Q0ViUlVYL0tSWXlEeGVVTTJYcWpBdz09

 

Session 2 - 14:00 – 17:00

Co-Design for new usage

Panelists: Peter Coveney, Marta Garcia, Berk Hess, Giovanni Pizzi, Bruno Raffin

Exascale computer are very likely to run more complex workloads than present supercomputer. This evolution is mainly driven by the development of data-analytics and the need to couple “standard” HPC computation and sophisticated data treatments. The new workloads will require to (co-)design hardware and software tools to manage complex workflows, code coupling, large ensemble runs, (in situ)data-analytics,…

     Zoom link:

     https://zoom.us/j/94418315362?pwd=VWRESW95dzkySWZyU1NiSkhzK3JQdz09